Huawei Pulls Ascend 960 Forward and Shows a Smaller SuperPoD

Huawei pulled its next training chip, the Ascend 960DT, into Q1 2027, three quarters ahead of last year’s plan. Rotating chairman David Wang said so on September 17 at Huawei Connect in Shanghai, while U.S. export rules still keep the densest chip factories out of China’s reach.

The same keynote put a new SuperPoD on stage. That machine, the Atlas 960E, uses 4,096 neural processors. In September 2025 Huawei had described an Atlas 960 SuperPoD with 15,488 Ascend 960 chips.

Last Year’s Atlas 960 SuperPoD Was 15,488 Chips

A SuperPoD, in Huawei’s wording, is a group of servers tied so tightly that they act as one computer, with shared memory addresses across boxes. The company has been selling that idea as the way to raise AI compute when each chip still lags Nvidia.

On September 18, 2025, rotating chairman Eric Xu unveiled an Atlas 960 SuperPoD that would pack up to 15,488 Ascend 960 chips in 220 cabinets across 2,200 square meters, rated at 30 EFLOPS of FP8 compute and due in the fourth quarter of 2027. The Atlas 950 SuperPoD beside it used 8,192 chips for 8 EFLOPS of FP8 in 160 cabinets on 1,000 square meters.

The product Huawei actually detailed on September 17 is named Atlas 960E, and it stops at 4,096 NPUs. That is 26% of the 2025 chip count, with 8 EFLOPS of FP8, matching the 950 SuperPoD’s cluster total with half as many cards because the 960 die is specified at twice the 950’s compute. China tech analyst Rui Ma wrote that the chip is coming way earlier, but the SuperPoD they announced is much smaller than the one laid out a year before.

THE SUPERPODS HUAWEI HAS PUT ON PAPER

Huawei did not say it had killed the 15,488-chip machine. It simply did not put that machine on the 2026 stage. The large count now sits in SuperCluster talk, where several SuperPoDs are wired together, which is a cleaner reading than a silent cancellation.

Q1 2027 for the Training Chip

Wang told the hall that Ascend 960 development had beaten the company’s own calendar and that performance was doubling as planned. Huawei’s 2026 keynote says the Ascend 960DT will be available in Q1 2027, three quarters ahead of the original roadmap, and the Ascend 960PR will be ready in Q3 2027, one quarter ahead.

We’re evolving our Ascend chip series on a one-generation-a-year cycle. In 2028 and 2029, we will roll out the Ascend 970 and 980 chips, respectively.

David Wang, rotating chairman, Huawei Connect in Shanghai

The 2025 keynote had set a single Ascend 960 for the fourth quarter of 2027 at 2 PFLOPS of FP8 and 4 PFLOPS of FP4, twice the 950 series at 1 PFLOPS of FP8 and 2 PFLOPS of FP4. It also promised twice the memory capacity, memory bandwidth, and interconnect ports. DT is the decode and training cut. PR is the prefill and recommendation cut. Those two roles split how much memory bandwidth a card needs, which is why Huawei packages them as separate products on the same die family.

A faster calendar is not the same thing as a finished factory run. Wang’s wording was “available” and “ready,” not a customer ship date for full SuperPoDs, and the 960 NPO system is still listed as under test.

How Huawei Plans to Wire 4,096 NPUs

The 960E’s pitch is optical, not a denser transistor. Huawei’s Hi-ONE engine is a near-packaged optics part, meaning the light source sits next to the processor so traffic does not hop through as many pluggable modules. Wang called it the first NPO product ready for mass production with a built-in light source, at 7.2 Tbit/s per engine, and said Huawei has filed an implementation agreement on NPO with the Optical Internetworking Forum.

WHAT THE 960E OPTICS CLAIM

• Chip count: One Atlas 960E SuperPoD scales to 4,096 NPUs with unified memory addressing and up to 1 petabyte of HBM.
• Module swap: 5,500 Hi-ONE units replace 48,000 conventional 800G optical modules on Huawei’s comparison.
• Power cut: That swap trims more than 550 kilowatts and is said to double fault-free running time, with 99.8% availability.

Those figures are Huawei’s. They have not been checked on a live 4,096-chip floor. They still show where the company thinks the bottleneck is: moving data among thousands of weaker chips, not winning a single-die bake-off with Nvidia.

UnifiedBus, the open protocol Huawei also calls Lingqu, is the fabric that is supposed to tie processors, memory, storage, and switches as peers. On top of it, Huawei named a Peerium Computing Architecture that uses nested parallelism and shared addresses so processors at million scale act as one machine. The first products on that architecture are the Atlas 950 SuperPoD and SuperClusters; Huawei says an Atlas 950 SuperCluster with 256,000 cards is already being deployed, and the Atlas 960 NPO system is under testing.

Huawei’s Markov Lab says a 100,000-NPU cluster built from 4,000-NPU SuperPoDs can raise model FLOPs utilization 2.75 times versus a cluster of 8-NPU servers, where intra-cluster chatter eats over 40% of training time. If those sims hold, the smaller SuperPoD is still large enough to be the brick for a much bigger pile.

The Die Still Loses to Nvidia

Pulling a chip forward does not close the gap that export rules were written to freeze. Epoch AI, in a September 4 analysis by Venkat Somala, estimates Huawei will produce less than 4% as much AI compute as Nvidia in 2026, and that the on-paper per-chip gap grows to about 17.5 times by next year.

EPOCH’S 2026 SCOREBOARD

The 950’s 2 PFLOPS of FP4 against the B300’s 13.5 PFLOPS is a 6.75 times hole on one card. Epoch also notes the 950DT’s 1 PFLOP of FP8 is about half an H100, a Nvidia part that started shipping in 2022. SMIC’s N+3 node, the process Epoch assigns to the 950 and 960 compute dies, is put at 113 million transistors per square millimeter, against about 224 million on TSMC’s N3P, or roughly half the density.

WHERE THE TWO SIDES DISAGREE

• Huawei: System scale, UnifiedBus, and SuperClusters up to 1 million NPUs can offset a weaker die, using process nodes the Chinese mainland can actually run.
• Epoch AI: Even if the roadmap ships, Huawei stays years behind on the chip and, with only Chinese-made high-bandwidth memory, could sit near 1% of Nvidia’s compute by 2028.

Xu said the same thing in plainer words in 2025: computing power is, and will continue to be, key to AI, especially in China, and the job is to build SuperPoDs on nodes that are practically available. That is a rack strategy. It is also a confession that the transistor contest is not the one Huawei can win this decade.

Customers Already Run More Than 1,000 SuperPoDs

The 960E is a brochure until it is a hall of cabinets. The installed base Huawei can point to is still last year’s machine. Wang said over 1,000 Atlas 900 A3 SuperPoDs have been deployed, and that the Atlas 950 SuperPoD is in large-scale commercial use. The A3 packs up to 384 Ascend 910C chips for 300 PFLOPS and was the brick under Huawei Cloud’s CloudMatrix 384 service.

Software is the other tax. Huawei says CANN, its neural-network stack, now has over 5,200 monthly active developers, 61% of them outside the company, and that more than 40 models have been natively pre-trained on Ascend. It also says Ascend supports over 90 third-party projects, including PyTorch, and is listed as the first official Chinese compute platform on PyTorch’s site. The Kunpeng CPU side is cited at 4.16 million developers, with openEuler past 20 million installs and the lead in China’s server OS share.

Chinese model labs are the buyers who feel this first. They cannot purchase Nvidia’s Rubin parts, and licensed older Nvidia silicon has been a political football. For them a 960DT in Q1 2027 is inventory, not a press-cycle. The constraint they already know is memory supply, yield, and whether CANN jobs finish without a rewrite.

Xi and Trump Meet on September 24

The Shanghai keynote landed seven days before Chinese President Xi Jinping is due to meet U.S. President Donald Trump in Washington on September 24. AI is on that docket as a talk about shared risk, not as a deal that reopens the best Nvidia dies.

THE WEEK AROUND THE CHIP

1. September 4, 2026: Epoch AI publishes its finding that Huawei remains under 4% of Nvidia’s AI compute this year.
2. September 17, 2026: Wang pulls the 960DT to Q1 2027 and unveils the 4,096-chip Atlas 960E in Shanghai.
3. September 24, 2026: Xi and Trump meet at the White House, with an AI dialogue expected and little sign of a broad chip-control unwind.

Both capitals want faster AI, not a pause. Huawei’s answer is a yearly Ascend cadence and a bigger optical rack. Washington’s answer has been to keep EUV tools and the densest memory stacks on a short leash. Ma’s view is that trying to freeze China’s chip work is futile because the self-sufficiency stakes are already too high, and that Huawei’s habit is to keep executing anyway.

The 256,000-Card Cluster Huawei Says Is Going In

The 2026 SuperCluster numbers sit above the SuperPoD, which is how 4,096 chips can coexist with talk of a million processors. Wang described an agent-oriented SuperCluster on a two-tier, four-plane Clos network that interconnects up to 512,000 NPUs, or 1 million with a multi-rail layout, plus a TaiShan 950 general-purpose SuperPoD of up to 4,096 nodes and a 256 TB memory pool, and an OceanStor M900 cache cluster that Huawei says stretches SSD life 16-fold.

Those million-NPU slides are still a plan. The figure Huawei says is happening now is the 256,000-card Atlas 950 SuperCluster. The 960 NPO system is the one still in the lab. Between them sits the 960DT, dated Q1 2027, a chip that arrived early on a SuperPoD that came out smaller than the one Huawei asked the industry to remember.